Tapas Rout AI Hardware Researcher at IIT Bhubaneswar

Tapas Rout

PhD Researcher, IIT Bhubaneswar

AI Hardware High-Performance Computing HW/SW Co-Design VLSI Design
Scholar GitHub LinkedIn Email Resume
Latest Updates

About Me

Ph.D. researcher at IIT Bhubaneswar specializing in AI hardware acceleration, VLSI design, and scalable architectures for both High-Performance Computing (HPC) and edge/embedded systems. My research focuses on bringing AI to resource-constrained environments by addressing critical trade-offs in power, latency, and throughput. I have hands-on experience with the full RTL-to-GDSII flow from design and verification to synthesis, place-and-route, and tapeout—on advanced nodes like TSMC 28nm and 65nm.

Prior to academia, I held various engineering and management roles in the private sector, where I led and executed projects of varying scale and complexity. I later joined CSIR-CEERI as part of the Integrated Circuits and Systems Group (ICSG) and the Intelligent Systems Group (ISG), contributing to flagship government-funded initiatives in secure processor design, neural accelerators, and real-time AR/VR systems.

Open to collaboration and discussions around AI hardware design and ASIC implementation.

Check out my latest projects

Skills

Programming
Verilog SystemVerilog System C C TCL Bash HTML/CSS
Embedded Boards
STM32 (M0/M4/M7/H7) ESP32 TI MSP430 Raspberry Pi 4 NVIDIA Jetson Xilinx Virtex-7
EDA Tools
Virtuoso Calibre Design Compiler Genus VCS NCSIM Innovus Vivado MATLAB Keil uVision Sentaurus TCAD
Technology Node
SCL 180nm TSMC 65nm TSMC 28nm

Education

  • IIT Bhubaneswar Logo
    Doctor of Philosophy 2025 – 2029
    IIT Bhubaneswar | Electronics & Communication Engineering
    GPA: 8.2/10
    SoC Design C++ TensorFlow
  • VSSUT Logo
    Bachelor of Technology 2012 – 2016
    VSSUT Burla | Electronics & Communication Engineering
    GPA: 7.6/10 Young Scientist Research Program
    Thesis: Simulation-Based Analysis of Tunneling Field-Effect Transistors for Low-Power Logic Applications
    Key Projects
    • Fabrication and Characterization of Si–Ge Infrared Detectors via DC Magnetron Sputtering (Class 1K cleanroom)
    • High-Throughput FPGA-Based Adaptive Filter Design Using LMS Algorithm for Noise Cancellation
    • FPGA Implementation of a Spiking Neural Network for Real-Time Pattern Recognition

Experience

  • IIT Bhubaneswar Logo
    Research Fellow 2024 – 2029
    IIT Bhubaneswar Research and Entrepreneurship Park
  • Central Electronics Engineering Research Institute Logo
    Project Associate 2022 – 2024
    Central Electronics Engineering Research Institute
    See Projects
    • Hardware-Accelerated Encryption and Key Management for Trusted Execution Environments on RISC-V in Secure IoT Applications.
    • Developed a pipeline for capturing acoustic signatures of real-world spaces and reproducing spatial audio for immersive AR/VR experiences.
    • Designed an image processing pipeline for automated segmentation and restoration of damaged Rajasthani murals for AR/VR-based digital heritage projects.
  • Pasupati Group
    Manager 2021 – 2022
    Pasupati Group
  • Pragati Milk Products Private Limited
    Instrumentation Engineer 2017 – 2018
    Pragati Milk Products Private Limited