Tapas Rout

PhD Researcher, IIT Bhubaneswar

AI Hardware High-Performance Computing HW/SW Co-Design VLSI Design

Latest Updates

09/2023: Presented FPGA-Based ECC Accelerator for IoT Devices at VDAT 2023

About Me

Ph.D. student at IIT Bhubaneswar specializing in energy-efficient hardware systems for edge computing. My research focuses on designing specialized digital architectures that push beyond the limitations of general-purpose designs, meeting stringent power, latency, and throughput targets. I have end-to-end hands-on experience across the full digital VLSI flow on advanced nodes (down to 28nm), including RTL design, verification, synthesis, physical design, and tapeout.

Previously, I’ve also contributed to flagship government-funded projects developing secure processors, neural accelerators, and real-time AR/VR pipelines. My ultimate goal is to build hardware solutions that are not only highly efficient but also robust and ready for deployment in real-world environments.

Open to collaboration and discussions around AI hardware design and ASIC implementation.

Check out my latest projects

Skills

Programming

Verilog SystemVerilog System C C TCL Bash HTML/CSS

Embedded Boards

STM32 (M0/M4/M7/H7) ESP32 TI MSP430 Raspberry Pi 4 NVIDIA Jetson Xilinx Virtex-7

EDA Tools

Virtuoso Calibre Design Compiler Genus VCS NCSIM Innovus Vivado MATLAB Keil uVision Sentaurus TCAD

Technology Node

SCL 180nm TSMC 65nm TSMC 28nm

Education

Doctor of Philosophy 2025 – 2029
IIT Bhubaneswar | Electronics & Communication Engineering
GPA: 8.2/10

SoC Design C++ TensorFlow
Bachelor of Technology 2012 – 2016
VSSUT Burla | Electronics & Communication Engineering
GPA: 7.6/10 Young Scientist Research Program
Thesis: Simulation-Based Analysis of Tunneling Field-Effect Transistors for Low-Power Logic Applications
Key Projects

Fabrication and Characterization of Si–Ge Infrared Detectors via DC Magnetron Sputtering (Class 1K cleanroom)

High-Throughput FPGA-Based Adaptive Filter Design Using LMS Algorithm for Noise Cancellation

FPGA Implementation of a Spiking Neural Network for Real-Time Pattern Recognition

Experience

Research Fellow 2024 – 2029
IIT Bhubaneswar Research and Entrepreneurship Park
Project Associate 2022 – 2024
Central Electronics Engineering Research Institute
See Projects
- Hardware-Accelerated Encryption and Key Management for Trusted Execution Environments on RISC-V in Secure IoT Applications.
- Developed a pipeline for capturing acoustic signatures of real-world spaces and reproducing spatial audio for immersive AR/VR experiences.
- Designed an image processing pipeline for automated segmentation and restoration of damaged Rajasthani murals for AR/VR-based digital heritage projects.
Manager 2021 – 2022
Pasupati Group
Instrumentation Engineer 2017 – 2018
Pragati Milk Products Private Limited